# Template Makefile - Based on a Makefile from devkitPRO

#---------------------------------------------------------------------------------
# TARGET is the name of the output
# BUILD is the directory where object files & intermediate files will be placed
# SOURCES is a list of directories containing source code
#---------------------------------------------------------------------------------
TARGET		:=	$(shell basename $(CURDIR))
BUILD		:=	.
SOURCES		:=	. modx

#---------------------------------------------------------------------------------
# options for code generation
#---------------------------------------------------------------------------------
CFLAGS		:=	-Wall -O2
CXXFLAGS	:= 	$(CFLAGS)

LDFLAGS 	:=

CC 		:= 	gcc
CXX 		:= 	g++

#---------------------------------------------------------------------------------
# any extra libraries we wish to link with the project
#---------------------------------------------------------------------------------
LIBS		:=

#---------------------------------------------------------------------------------
# more vars
#---------------------------------------------------------------------------------
OUTPUT		:=	$(CURDIR)/$(TARGET)

CFILES		:=	$(foreach dir,$(SOURCES),$(wildcard $(dir)/*.c))
CPPFILES	:=	$(foreach dir,$(SOURCES),$(wildcard $(dir)/*.cpp))

OFILES		:=	$(CPPFILES:.cpp=.o) $(CFILES:.c=.o)
#---------------------------------------------------------------------------------
# use CXX for linking C++ projects, CC for standard C
#---------------------------------------------------------------------------------
ifeq ($(strip $(CPPFILES)),)
#---------------------------------------------------------------------------------
	LD		:=	$(CC)
#---------------------------------------------------------------------------------
else
#---------------------------------------------------------------------------------
	LD		:=	$(CXX)
#---------------------------------------------------------------------------------
endif
#---------------------------------------------------------------------------------
# now the rules...
#---------------------------------------------------------------------------------

.PHONY: clean

$(TARGET): $(OFILES)
	$(LD) -o $(OUTPUT) $(OFILES) $(LIBS) $(LDFLAGS)

.c.o:
	$(LD) -c $(CFLAGS) $<

all: $(TARGET)

run: $(TARGET)
	./$(TARGET)

clean:
	@echo clean ...
	@rm -fr $(TARGET) $(OFILES)

